Methods of manufacturing a stressed MOS transistor structure

US7338847B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• M. Shaheed · Portland, US
• Thomas Hoffmann · Santa Cruz, US
• Mark Armstrong · Portland, US
• Christopher P. Auth · Portland, US

Key dates

• Filing date: Dec 27, 2004
• Grant date: Mar 4, 2008
• Expiry date: May 17, 2025

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/792

Abstract

An intentional recess or indentation is created in a region of semiconductor material that will become part of a channel of a metal oxide semiconductor (MOS) transistor structure. A layer is created on a surface of the recess to induce an appropriate type of stress in the channel.