Thomas Hoffmann
67Patents
12h-index
79Co-inventors
87Inventor score
Filing activity: Aug 20, 1979 → Nov 20, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US4258948A | Roofer's bundle tool | Performing Operations; Transporting | 69 | Expired |
| US6949482B2 | Method for improving transistor performance through reducing the salicide interface resistance | Emerging Cross-Sectional Technologies | 67 | Expired |
| US5838517A | Shock protected high stack density suspension system | Physics | 37 | Expired |
| US6870179B2 | Increasing stress-enhanced drive current in a MOS transistor | Electricity | 32 | Expired |
| US5497282A | Disk drive system having open slot swage connection | Physics | 24 | Expired |
| US7274055B2 | Method for improving transistor performance through reducing the salicide interface resistance | Emerging Cross-Sectional Technologies | 23 | Expired |
| US6069773A | Shock protected high stack density suspension system | Physics | 20 | Expired |
| US4643316A | Sorting tray | Performing Operations; Transporting | 18 | Expired |
| US9054219B1 | Semiconductor devices having fin structures and fabrication methods thereof | Electricity | 18 | Active |
| US5930080A | Transducer suspension system | Emerging Cross-Sectional Technologies | 15 | Expired |
| US9299801B1 | Method for fabricating a transistor device with a tuned dopant profile | Electricity | 14 | Active |
| US7045408B2 | Integrated circuit with improved channel stress properties and a method for making it | Electricity | 14 | Expired |
| US8735987B1 | CMOS gate stack structures and processes | Electricity | 12 | Active |
| US5742996A | Method of manufacturing a transducer suspension system | Emerging Cross-Sectional Technologies | 10 | Expired |
| US6578341B2 | Butt joint of frame components | Mechanical Engineering; Lighting; Heating | 9 | Expired |
| US8813755B2 | Surgical cover having integrated fluid barrier | Human Necessities | 9 | Active |
| US9196727B2 | High uniformity screen and epitaxial layers for CMOS devices | Electricity | 6 | Active |
| US8614128B1 | CMOS structures and processes based on selective thinning | Electricity | 6 | Active |
| US7338847B2 | Methods of manufacturing a stressed MOS transistor structure | Electricity | 5 | Expired |
| US9299698B2 | Semiconductor structure with multiple transistors having various threshold voltages | Electricity | 5 | Active |
| US8629016B1 | Multiple transistor types formed in a common epitaxial layer by differential out-diffusion from a doped underlayer | Electricity | 5 | Active |
| US7482670B2 | Enhancing strained device performance by use of multi narrow section layout | Emerging Cross-Sectional Technologies | 4 | Active |
| US7452764B2 | Gate-induced strain for MOS performance improvement | Electricity | 4 | Expired |
| US7101765B2 | Enhancing strained device performance by use of multi narrow section layout | Emerging Cross-Sectional Technologies | 4 | Expired |
| US10700065B2 | Leakage current reduction in electrical isolation gate structures | Electricity | 4 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.