Integration of barrier layer and seed layer
US7352048B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2005 |
| Grant date | Apr 1, 2008 |
| Priority date | — |
| Expiry date | Dec 14, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/903
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention generally relates to filling of a feature by depositing a barrier layer, depositing a seed layer over the barrier layer, and depositing a conductive layer over the seed layer. In one embodiment, the seed layer comprises a copper alloy seed layer deposited over the barrier layer. For example, the copper alloy seed layer may comprise copper and a metal, such as aluminum, magnesium, titanium, zirconium, tin, and combinations thereof. In another embodiment, the seed layer comprises a copper alloy seed layer deposited over the barrier layer and a second seed layer deposited over the copper alloy seed layer. The copper alloy seed layer may comprise copper and a metal, such as aluminum, magnesium, titanium, zirconium, tin, and combinations thereof. The second seed layer may comprise a metal, such as undoped copper. In still another embodiment, the seed layer comprises a first seed layer and a second seed layer. The first seed layer may comprise a metal, such as aluminum, magnesium, titanium, zirconium, tin, and combinations thereof. The second seed layer may comprise a metal, such as undoped copper.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.