Process for preparing electronics structures using a sacrificial multilayer hardmask scheme
US7371684B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 16, 2005 |
| Grant date | May 13, 2008 |
| Priority date | — |
| Expiry date | May 16, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/7682
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for preparing an electronics structure involves coating a substrate stack with a sacrificial multilayer hardmask stack, developing a pattern in a resist layer coated on a topmost layer of the multilayer hardmask stack, transferring the pattern into the hardmask stack, blocking a portion of the pattern, and then transferring an unblocked portion of the pattern into the substrate stack. Electronics structures prepared with the process are useful to prepare electronics devices, such as computers and the like. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader quickly to ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the appended issued claims.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.