Method of packaging semiconductor die without lead frame or substrate
US7432130B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2006 |
| Grant date | Oct 7, 2008 |
| Priority date | — |
| Expiry date | Feb 16, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of packaging a semiconductor die (10) includes providing a flip-chip die (10) with bump connections (12) on its bottom surface (14). An adhesive tape (18) is attached to a plate surface (16) and lead fingers (20) are formed on the tape (18). The die (10) is placed on the tape (18) such that the bumps (12) on the die (10) contact respective ones of the lead fingers (20) on the tape (18). A reflow process is performed on the die (10), the tape (18) and the plate (16), which forms C5 type interconnects. A mold compound (24) is formed over the die (10) and the tape (18), and then the tape (18) and the plate (16) are removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.