Patent · US Expired

Methods for making dual-damascene dielectric structures

US7501339B2 · kind B2 · utility

0Cited by
10References
17Claims
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Assignee

Inventors

Key dates

Filing dateMar 23, 2006
Grant dateMar 10, 2009
Priority date
Expiry dateMar 30, 2026

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/02274
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A dielectric structure and method for making a dielectric structure for dual-damascene applications over a substrate are provided. The method includes forming a barrier layer over the substrate, forming an inorganic dielectric layer over the barrier layer, and forming a low dielectric constant layer over the inorganic dielectric layer. In this preferred example, the method also includes forming a trench in the low dielectric constant layer using a first etch chemistry. The etching is timed to etch through a partial thickness of the low dielectric constant layer and the first etch chemistry is optimized to a selected low dielectric constant material. The method further includes forming a via hole in the inorganic dielectric layer using a second etch chemistry, such that the via is within the trench. In a specific example, the inorganic dielectric layer can be an un-doped TEOS oxide or a fluorine doped oxide, and the low dielectric constant layer can be a carbon doped oxide (C-oxide) or other low K dielectrics.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.