Diffusion barrier for nickel silicides in a semiconductor fabrication process

US7544576B2 · kind B2 · utility

Assignee

• Freeescale Semiconductor, Inc. · US

Inventors

• Dharmesh Jawarani · Round Rock, US
• Chun-Li Liu · Scottsdale, US
• Marius Orlowski · Meylan, FR

Key dates

• Filing date: Jul 29, 2005
• Grant date: Jun 9, 2009
• Expiry date: Jul 5, 2026

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/662

Abstract

A semiconductor fabrication method includes forming a gate module overlying a substrate. Recesses are etched in the substrate using the gate module as a mask. A barrier layer is deposited over the wafer and anisotropically etched to form barrier “curtains” on sidewalls of the source/drain recesses. A metal layer is deposited wherein the metal layer contacts a semiconductor within the recess. The wafer is annealed to form a silicide selectively. The diffusivity of the metal with respect to the barrier structure material is an order of magnitude less than the diffusivity of the metal with respect to the semiconductor material. The etched recesses may include re-entrant sidewalls. The metal layer may be a nickel layer and the barrier layer may be a titanium nitride layer. Silicon or silicon germanium epitaxial structures may be formed in the recesses overlying the semiconductor substrate.