Method of manufacturing a silicon dioxide layer

US7645486B2 · kind B2 · utility

Assignees

• S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES · FR
• ASM International N.V. · NL

Inventors

• Konstantin Bourdelle · Castelsarrasin, FR
• Nicolas Daval · Goncelin, FR
• Ian Cayrefourcq · Meylan, FR
• Steven R. A. Van Aerde · Tielt-Winge, BE
• Marinus De Blank · Heverlee, BE
• Cornelius A. van der Jeugd · Heverlee, BE

Key dates

• Filing date: Feb 22, 2007
• Grant date: Jan 12, 2010
• Expiry date: Jan 11, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/02271
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

The invention relates to a of manufacturing a silicon dioxide layer of low roughness, that includes depositing a layer of silicon dioxide over a substrate by a low pressure chemical vapor deposition (LPCVD) process, the deposition process employing simultaneously a flow of tetraethylorthosilicate (TEOS) as the source material for the film deposition and a flow of a diluant gas that it not reactive with TEOS, so that the diluant gas/TEOS flow ratio is between 0.5 and 100; and annealing the silicon dioxide layer at a temperature between 600° C. and 1200° C., for a duration between 10 minutes and 6 hours.