Nicolas Daval
25Patents
6h-index
33Co-inventors
69Inventor score
Filing activity: Mar 12, 2003 → Aug 14, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7459374B2 | Method of manufacturing a semiconductor heterostructure | Electricity | 17 | Active |
| US6991956B2 | Methods for transferring a thin layer from a wafer having a buffer layer | Electricity | 12 | Expired |
| US7449394B2 | Atomic implantation and thermal treatment of a semiconductor layer | Electricity | 11 | Active |
| US7232737B2 | Treatment of a removed layer of silicon-germanium | Emerging Cross-Sectional Technologies | 9 | Expired |
| US7166894B2 | Schottky power diode with SiCOI substrate and process for making such diode | Emerging Cross-Sectional Technologies | 7 | Expired |
| US7282449B2 | Thermal treatment of a semiconductor layer | Electricity | 6 | Expired |
| US7446019B2 | Method of reducing roughness of a thick insulating layer | Electricity | 6 | Active |
| US8367521B2 | Manufacture of thin silicon-on-insulator (SOI) structures | Electricity | 6 | Active |
| US7078353B2 | Indirect bonding with disappearance of bonding layer | Emerging Cross-Sectional Technologies | 5 | Expired |
| US7276428B2 | Methods for forming a semiconductor structure | Electricity | 4 | Expired |
| US10957577B2 | Method for fabricating a strained semiconductor-on-insulator substrate | Electricity | 4 | Active |
| US7645486B2 | Method of manufacturing a silicon dioxide layer | Electricity | 3 | Active |
| US7531427B2 | Thermal oxidation of a SiGe layer and applications thereof | Electricity | 2 | Active |
| US7285495B2 | Methods for thermally treating a semiconductor layer | Emerging Cross-Sectional Technologies | 2 | Expired |
| US8753528B2 | Etchant for controlled etching of Ge and Ge-rich silicon germanium alloys | Chemistry; Metallurgy | 0 | Active |
| US11876020B2 | Method for manufacturing a CFET device | Electricity | 0 | Active |
| US8183128B2 | Method of reducing roughness of a thick insulating layer | Electricity | 0 | Active |
| US11728207B2 | Method for fabricating a strained semiconductor-on-insulator substrate | Electricity | 0 | Active |
| US12100727B2 | Method for manufacturing a substrate for a front-facing image sensor | Electricity | 0 | Active |
| US9018678B2 | Method for forming a Ge on III/V-on-insulator structure | Electricity | 0 | Active |
| US7452792B2 | Relaxation of layers | Electricity | 0 | Active |
| US9768057B2 | Method for transferring a layer from a single-crystal substrate | Electricity | 0 | Active |
| US10672646B2 | Method for fabricating a strained semiconductor-on-insulator substrate | Electricity | 0 | Active |
| US9177961B2 | Wafer with intrinsic semiconductor layer | Electricity | 0 | Active |
| US12261079B2 | Method for fabricating a strained semiconductor-on-insulator substrate | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.