Patent · US Active

Workpiece with semiconductor chips and molding, semiconductor device and method for producing a workpiece with semiconductors chips

US7687895B2 · kind B2 · utility

21Cited by

17References

41Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Markus Brunnbauer · Lappersdorf, DE
Jens Pohl · San Luis Obispo, US
Klaus Pressel · Regensburg, DE
Thorsten Meyer · Regensburg, DE
Recai Sezi · Simmerath, DE
Stephan Bradl · Regensburg, DE
Ralf Plieninger · Poing, DE

Key dates

Filing date	Nov 14, 2007
Grant date	Mar 30, 2010
Priority date	—
Expiry date	Jan 4, 2028

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/3025
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also includes an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer. In the molding compound a contact via is arranged.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.