Methods for forming high performance gates and structures thereof

US7790553B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Huilong Zhu · Poughkeepsie, US
• Xiaomeng Chen · Hsinchu, TW
• Mahender Kumar · Hopewell Junction, US
• Brian J. Greene · Wappingers Falls, US
• Bachir Dirahoui · Mount Kisco, US
• Jay William Strane · Wappingers Falls, US
• Gregory G. Freeman · Hopewell Junction, US

Key dates

• Filing date: Jul 10, 2008
• Grant date: Sep 7, 2010
• Expiry date: Oct 13, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0181

Abstract

Methods for forming high performance gates in MOSFETs and structures thereof are disclosed. One embodiment includes a method including providing a substrate including a first short channel active region, a second short channel active region and a long channel active region, each active region separated from another by a shallow trench isolation (STI); and forming a field effect transistor (FET) with a polysilicon gate over the long channel active region, a first dual metal gate FET having a first work function adjusting material over the first short channel active region and a second dual metal gate FET having a second work function adjusting material over the second short channel active region, wherein the first and second work function adjusting materials are different.