Integrated circuit system for suppressing short channel effects

US7867835B2 · kind B2 · utility

Assignee

• Chartered Semiconductor Manufacturing LTD · SG

Inventors

• Jae Gon Lee · Singapore, SG
• Elgin Quek · Singapore, SG
• Young Way Teh · Singapore, SG
• Wenzhi Gao · Singapore, SG

Key dates

• Filing date: Feb 29, 2008
• Grant date: Jan 11, 2011
• Expiry date: Jan 25, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

An integrated circuit system that includes: providing a substrate including an active device with a gate and a gate dielectric; forming a first liner, a first spacer, a second liner, and a second spacer adjacent the gate; forming a material layer over the integrated circuit system; forming an opening between the material layer and the first spacer by removing a portion of the material layer, the second spacer, and the second liner to expose the substrate; and forming a source/drain extension and a halo region through the opening.