Reconfigured wafer alignment

US7943423B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Jens Pohl · San Luis Obispo, US
• Edward Fuergut · Nuremberg, DE
• Markus Brunnbauer · Lappersdorf, DE
• Thorsten Meyer · Regensburg, DE
• Peter Strobel · Regensburg, DE
• Daniel Porwol · Straubing, DE
• Ulrich Wachter · Regensburg, DE

Key dates

• Filing date: Mar 10, 2009
• Grant date: May 17, 2011
• Expiry date: Mar 10, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/15311
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method of manufacturing semiconductor device comprises placing multiple chips onto a carrier. An encapsulation material is applied to the multiple chips and the carrier for forming an encapsulation workpiece. The encapsulation workpiece having a first main face facing the carrier and a second main face opposite to the first main face. Further, marking elements are applied to the encapsulation workpiece relative to the multiple chips, the marking elements being detectable on the first main face and on the second main face.