High-K/metal gate CMOS finFET with improved pFET threshold voltage

US7993999B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Veeraraghavan S. Basker · Schenectady, US
• Kangguo Cheng · Schenectady, US
• Bruce B. Doris · Brewster, US
• Johnathan E. Faltermeier · San Jose, US
• Ali Khakifirooz · Los Altos, US

Key dates

• Filing date: Nov 9, 2009
• Grant date: Aug 9, 2011
• Expiry date: Nov 9, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/215

Abstract

A device and method for fabrication of fin devices for an integrated circuit includes forming fin structures in a semiconductor material of a semiconductor device wherein the semiconductor material is exposed on sidewalls of the fin structures. A donor material is epitaxially deposited on the exposed sidewalls of the fin structures. A condensation process is applied to move the donor material through the sidewalls into the semiconductor material such that accommodation of the donor material causes a strain in the semiconductor material of the fin structures. The donor material is removed, and a field effect transistor is formed from the fin structure.