Atomic layer deposition processes for non-volatile memory devices

US8043907B2 · kind B2 · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Yi Ma · Orlando, US
• Shreyas Kher · Campbell, US
• Khaled Ahmed · Anaheim, US
• Tejal Goyani · Sunnyvale, US
• Maitreyee Mahajani · Saratoga, US
• Jallepally Ravi · Santa Clara, US
• Yi-Chiau Huang · Fremont, US

Key dates

• Filing date: Jan 14, 2010
• Grant date: Oct 25, 2011
• Expiry date: Jan 14, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/035

Abstract

Embodiments of the invention provide memory devices and methods for forming such memory devices. In one embodiment, a method for fabricating a non-volatile memory device on a substrate is provided which includes depositing a first polysilicon layer on a substrate surface, depositing a silicon oxide layer on the first polysilicon layer, depositing a first silicon oxynitride layer on the silicon oxide layer, depositing a silicon nitride layer on the first silicon oxynitride layer, depositing a second silicon oxynitride layer on the silicon nitride layer, and depositing a second polysilicon layer on the second silicon oxynitride layer. In some examples, the first polysilicon layer is a floating gate and the second polysilicon layer is a control gate.