Surface treatment to improve resistive-switching characteristics

US8062918B2 · kind B2 · utility

Assignee

• INTERMOLECULAR, INC. · US

Inventors

• Michael Miller · Eden Prairie, US
• Prashant B. Phatak · San Jose, US
• Tony P. Chiang · Campbell, US
• Xiying Chen · San Jose, US
• April D. Schricker · Fremont, US
• Tanmay Kumar · Pleasanton, US

Key dates

• Filing date: Dec 29, 2008
• Grant date: Nov 22, 2011
• Expiry date: Sep 3, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B63/80
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

This disclosure provides a method of fabricating a semiconductor device layer and associated memory cell structures. By performing a surface treatment process (such as ion bombardment) of a semiconductor device layer to create defects having a deliberate depth profile, one may create multistable memory cells having more consistent electrical parameters. For example, in a resistive-switching memory cell, one may obtain a tighter distribution of set and reset voltages and lower forming voltage, leading to improved device yield and reliability. In at least one embodiment, the depth profile is selected to modulate the type of defects and their influence on electrical properties of a bombarded metal oxide layer and to enhance uniform defect distribution.