Pass-through 3D interconnect for microelectronic dies and associated systems and methods
US8084854B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2007 |
| Grant date | Dec 27, 2011 |
| Priority date | — |
| Expiry date | Nov 10, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/01019
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Pass-through 3D interconnects and microelectronic dies and systems of stacked dies that include such interconnects are disclosed herein. In one embodiment, a system of stacked dies includes a first microelectronic die having a substrate, a metal substrate pad, and a first integrated circuit electrically coupled to the substrate pad. A pass-through 3D interconnect extends between front and back sides of the substrate, including through the substrate pad. The pass-through interconnect is electrically isolated from the substrate pad and electrically coupled to a second integrated circuit of a second microelectronic die attached to the back side of the substrate. In another embodiment, the first integrated circuit is a first memory device and the second integrated circuit is a second memory device, and the system uses the pass-through interconnect as part of an independent communication path to the second memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.