Wafer grounding methodology
US8094428B2 · kind B2 · utility
5Cited by
13References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 27, 2008 |
| Grant date | Jan 10, 2012 |
| Priority date | — |
| Expiry date | Sep 24, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/24564
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An apparatus for increasing electric conductivity to a wafer substrate, when exposed to electron beam irradiation, is disclosed. More specifically, a methodology to breakdown the insulating layer on wafer backside is provided to significantly reduce the damage on the wafer backside while proceeding with the grounding process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.