Methods and systems for barrier layer surface passivation
US8133812B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2009 |
| Grant date | Mar 13, 2012 |
| Priority date | — |
| Expiry date | Sep 18, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76873
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
This invention pertains to methods and systems for fabricating semiconductor devices. One aspect of the present invention is a method of depositing a gapfill copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the method includes forming the barrier layer on a surface of a substrate and subjecting the barrier layer to a process condition so as to form a removable passivated surface on the barrier layer. The method further includes removing the passivated surface from the barrier layer and depositing the gapfill copper layer onto the barrier layer. Another aspect of the present invention is an integrated system for depositing a copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the integrated system comprises at least one process module configured for barrier layer deposition and passivated surface formation and at least one other process module configured for passivated surface removal and deposition of copper onto the barrier layer. The system further includes at least one transfer module coupled so that the substrate can be transferred between the modules substantially without exposure to an oxide-…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.