Cluster tool architecture for processing a substrate

US8181596B2 · kind B2 · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Tetsuya Ishikawa · Fuji, JP
• Rick J. Roberts · San Jose, US
• Helen R. Armer · Cupertino, US
• Leon Volfovski · Mountain View, US
• Jay D. Pinson, II · San Jose, US
• Michael R. Rice · Pleasanton, US
• David H. Quach · San Jose, US
• Mohsen Salek · Cupertino, US
• Robert B. Lowrance · Los Gatos, US
• John A. Backer · San Jose, US
• William T. Weaver · Austin, US
• Charles T. Carlson · Cedar Park, US
• Chongyang Wang · Hejian, CN
• Jeffrey C. Hudgens · San Francisco, US
• Harald Herchen · Los Altos, US
• Brian Lu · Fremont, US

Key dates

• Filing date: Oct 20, 2008
• Grant date: May 22, 2012
• Expiry date: Oct 17, 2030

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10T29/5323
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An apparatus for processing substrates using a multi-chamber processing system (e.g., a cluster tool) that has an increased system throughput, increased system reliability, a smaller system footprint, and a more repeatable wafer history. Embodiments provide for a cluster tool comprising first and second processing racks, each having two or more vertically stacked substrate processing chambers, a first robot assembly able to access the first processing rack from a first side, a second robot assembly able to access the first processing rack from a second side and the second processing rack from a first side, a third robot assembly able to access the second processing rack from a second side, and a fourth robot assembly able to access the first and second processing racks and to load substrates in a cassette.