Packaged semiconductor device with encapsulant embedding semiconductor chip that includes contact pads
US8183696B2 · kind B2 · utility
38Cited by
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20Claims
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Key dates
| Filing date | Mar 31, 2010 |
| Grant date | May 22, 2012 |
| Priority date | — |
| Expiry date | Aug 27, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a semiconductor chip, an encapsulant embedding the semiconductor chip, first contact pads on a first main face of the semiconductor package and second contact pads on a second main face of the semiconductor package opposite to the first main face. The diameter d in micrometers of an exposed contact pad area of the second contact pads satisfies d≧(8/25)x+142 μm, wherein x is the pitch of the second contact pads in micrometers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.