Direct contact in trench with three-mask shield gate process
US8187939B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2009 |
| Grant date | May 29, 2012 |
| Priority date | — |
| Expiry date | Jan 6, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/663
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device and a method for making a semiconductor device are disclosed. A trench mask may be applied to a semiconductor substrate, which is etched to form trenches with three different widths. A first conductive material is formed at the bottom of the trenches. A second conductive material is formed over the first conductive material. An insulator layer separates the first and second conductive materials. A first insulator layer is deposited on top of the trenches. A body layer is formed in a top portion of the substrate. A source is formed in the body layer. A second insulator layer is applied on top of the trenches and the source. A contact mask is applied on top of the second insulator layer. Source and gate contacts are formed through the second insulator layer. Source and gate metal are formed on top of the second insulator layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.