Shielded gate trench MOSFET device and fabrication
US8193580B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2009 |
| Grant date | Jun 5, 2012 |
| Priority date | — |
| Expiry date | Jan 13, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/519
Abstract
A semiconductor device embodiment includes a substrate, an active gate trench in the substrate, and an asymmetric trench in the substrate. The asymmetric trench has a first trench wall and a second trench wall, the first trench wall is lined with oxide having a first thickness, and the second trench wall is lined with oxide having a second thickness that is different from the first thickness. Another semiconductor device embodiment includes a substrate, an active gate trench in the substrate; and a source polysilicon pickup trench in the substrate. The source polysilicon pickup trench includes a polysilicon electrode, and top surface of the polysilicon electrode is below a bottom of a body region. Another semiconductor device includes a substrate, an active gate trench in the substrate, the active gate trench has a first top gate electrode and a first bottom source electrode, and a gate runner trench comprising a second top gate electrode and a second bottom source electrode. The second top gate electrode is narrower than the second bottom source electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.