Technique for providing stress sources in transistors in close proximity to a channel region by recessing drain and source regions

US8274120B2 · kind B2 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Andy Wei · Queensbury, US
• Thorsten Kammler · Radeberg, DE
• Jan Hoentschel · Dresden, DE
• Manfred Horstmann · Dresden, DE
• Peter Javorka · Radebeul, DE
• Joe Bloomquist · Dresden, DE

Key dates

• Filing date: Feb 23, 2010
• Grant date: Sep 25, 2012
• Expiry date: May 17, 2030

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

By recessing drain and source regions, a highly stressed layer, such as a contact etch stop layer, may be formed in the recess in order to enhance the strain generation in the adjacent channel region of a field effect transistor. Moreover, a strained semiconductor material may be positioned in close proximity to the channel region by reducing or avoiding undue relaxation effects of metal silicides, thereby also providing enhanced efficiency for the strain generation. In some aspects, both effects may be combined to obtain an even more efficient strain-inducing mechanism.