Electronic component with buffer layer
US8283756B2 · kind B2 · utility
3Cited by
31References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 20, 2007 |
| Grant date | Oct 9, 2012 |
| Priority date | — |
| Expiry date | Aug 31, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic component includes a metal substrate, a semiconductor chip configured to be attached to the metal substrate, and a buffer layer positioned between the metal substrate and the semiconductor chip configured to mechanically decouple the semiconductor chip and the metal substrate. The buffer layer extends across less than an entire bottom surface of the semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.