Semiconductor transistor device structure with back side gate contact plugs, and related manufacturing method
US8294211B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 2010 |
| Grant date | Oct 23, 2012 |
| Priority date | — |
| Expiry date | Aug 3, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/215
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device with back side conductive plugs is provided here. The method begins by forming a gate structure overlying a semiconductor-on-insulator (SOI) substrate. The SOI substrate has a support layer, an insulating layer overlying the support layer, an active semiconductor region overlying the insulating layer, and an isolation region outboard of the active semiconductor region. A first section of the gate structure is formed overlying the isolation region and a second section of the gate structure is formed overlying the active semiconductor region. The method continues by forming source/drain regions in the active semiconductor region, and thereafter removing the support layer from the SOI substrate. Next, the method forms conductive plugs for the gate structure and the source/drain regions, where each of the conductive plugs passes through the insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.