Patent · US Active

Offset solder vias, methods of manufacturing and design structures

US8298929B2 · kind B2 · utility

4Cited by

4References

6Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Timothy H. Daubenspeck · Colchester, US
Gary LaFontant · Elmont, US
Ekta Misra · Hillsboro, US
David L. Questad · Hopewell Junction, US
George J. Scott · Chandler, US
Krystyna W. Semkow · Poughquag, US
Timothy D. Sullivan · Batavia, US
Thomas A. Wassick · Lagrangeville, US
Steven L. Wright · Whitehall Corners, US

Key dates

Filing date	Dec 3, 2010
Grant date	Oct 30, 2012
Priority date	—
Expiry date	Mar 30, 2031

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02P90/02
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Semiconductor structures, methods of manufacture and design structures are provided. The structure includes at least one offset crescent shaped solder via formed in contact with an underlying metal pad of a chip. The at least one offset crescent shaped via is offset with respect to at least one of the underlying metal pad and an underlying metal layer in direct electrical contact with an interconnect of the chip which is in electrical contact with the underlying metal layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.