Void free interlayer dielectric
US8367493B1 · kind B1 · utility
10Cited by
4References
17Claims
0Family size
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Key dates
| Filing date | Apr 20, 2005 |
| Grant date | Feb 5, 2013 |
| Priority date | — |
| Expiry date | Aug 10, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a non-volatile memory device includes forming a number of memory cells. The method also includes depositing a first dielectric layer over the memory cells, where the first dielectric layer is a conformal layer having a substantially uniform thickness. The method further includes depositing a second dielectric layer over the first dielectric layer. Together, the first and second dielectric layers form an interlayer dielectric without voids.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.