Memory device with improved performance
US8373148B2 · kind B2 · utility
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24References
8Claims
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Key dates
| Filing date | Apr 26, 2007 |
| Grant date | Feb 12, 2013 |
| Priority date | — |
| Expiry date | Apr 26, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/883
Abstract
The present resistive memory device includes first and second electrodes. An active layer is situated between the first and second electrodes. The active layer with advantage has a thermal conductivity of 0.02 W/Kcm or less, and is surrounded by a body in contact with the layer, the body having a thermal conductivity of 0.01 W/Kcm or less.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.