Patent · US Active

Integrated circuit having an embedded memory and method for testing the memory

US8379466B2 · kind B2 · utility

5Cited by

37References

12Claims

0Family size

Assignee

Freeescale Semiconductor, Inc. · US

Inventors

Shayan Zhang · Cedar Park, US
James D. Burnett · Austin, US
Kent P. Fancher · Austin, US
Andrew C. Russell · Austin, US
Michael D. Snyder · Cedar Park, US

Key dates

Filing date	Mar 31, 2009
Grant date	Feb 19, 2013
Priority date	—
Expiry date	Aug 26, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/41
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A memory system has a first memory having an array of memory cells that includes a redundant column. The redundant column substitutes for a first column in the array. The first column includes a test memory cell. The array receives a power supply voltage. The test memory cell becomes non-functional at a higher power supply voltage than the memory cells of the array. A memory controller is coupled to the first memory and is for determining if the test memory cell is functional at a first value for the power supply voltage. This is useful in making decisions concerning the value of the power supply voltage applied to the array.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.