Semiconductor device comprising self-aligned contact bars and metal lines with increased via landing regions
US8399352B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2011 |
| Grant date | Mar 19, 2013 |
| Priority date | — |
| Expiry date | Dec 20, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
When forming metal lines of the metal zero level, a reduced bottom width and an increased top width may be achieved by using appropriate patterning regimes, for instance using a spacer structure after forming an upper trench portion with a top width, or forming the lower portion of the trenches and subsequently applying a further mask and etch regime in which the top width is implemented. In this manner, metal lines connecting to self-aligned contact bars may be provided so as to exhibit a bottom width of 20 nm and less, while the top width may allow reliable contact to any vias of the metallization system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.