Integrated circuit packaging system with package-on-package and method of manufacture thereof
US8432028B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2011 |
| Grant date | Apr 30, 2013 |
| Priority date | — |
| Expiry date | Oct 26, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacture of an integrated circuit packaging system includes: providing a base substrate having a base substrate top side; mounting a base integrated circuit over the base substrate top side, the base integrated circuit having an active side opposite an inactive side with the inactive side facing the base substrate top side; attaching a peripheral interconnect to the base substrate top side and a device peripheral pad of the base integrated circuit at the active side; mounting an interposer over the base integrated circuit and the peripheral interconnect, the interposer having an interposer top side and a window; and attaching a central interconnect to the interposer top side and a device central pad of the base integrated circuit at the active side, the central interconnect through the window.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.