Surface treatment to improve resistive-switching characteristics
US8465996B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2012 |
| Grant date | Jun 18, 2013 |
| Priority date | — |
| Expiry date | Aug 23, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B63/80
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This disclosure provides a method of fabricating a semiconductor device layer and associated memory cell structures. By performing a surface treatment process (such as ion bombardment) of a semiconductor device layer to create defects having a deliberate depth profile, one may create multistable memory cells having more consistent electrical parameters. For example, in a resistive-switching memory cell, one may obtain a tighter distribution of set and reset voltages and lower forming voltage, leading to improved device yield and reliability. In at least one embodiment, the depth profile is selected to modulate the type of defects and their influence on electrical properties of a bombarded metal oxide layer and to enhance uniform defect distribution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.