Physical design system and method
US8473885B2 · kind B2 · utility
7Cited by
22References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2012 |
| Grant date | Jun 25, 2013 |
| Priority date | — |
| Expiry date | Mar 7, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A design system for designing complex integrated circuits (ICs), a method of IC design and program product therefor. A layout unit receives a circuit description representing portions in a grid and glyph format. A checking unit checks grid and glyph portions of the design. An elaboration unit generates a target layout from the checked design. A data prep unit prepares the target layout for mask making. A pattern caching unit selectively replaces portions of the design with previously cached results for improved design efficiency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.