Leon Stok
10Patents
7h-index
30Co-inventors
66Inventor score
Filing activity: Apr 28, 1998 → May 14, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7536664B2 | Physical design system and method | Physics | 32 | Expired |
| US6334205A | Wavefront technology mapping | Physics | 31 | Expired |
| US7047163B1 | Method and apparatus for applying fine-grained transforms during placement synthesis interaction | Physics | 17 | Expired |
| US7178120B2 | Method for performing timing closure on VLSI chips in a distributed environment | Physics | 16 | Expired |
| US6557159B1 | Method for preserving regularity during logic synthesis | Physics | 11 | Expired |
| US6167557A | Method and apparatus for logic synthesis employing size independent timing optimization | Physics | 7 | Expired |
| US8473885B2 | Physical design system and method | Physics | 7 | Active |
| US8219943B2 | Physical design system and method | Physics | 3 | Active |
| US6966046B2 | CMOS tapered gate and synthesis method | Physics | 3 | Expired |
| US10839133B1 | Circuit layout similarity metric for semiconductor testsite coverage | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.