Strained devices, methods of manufacture and design structures

US8486776B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Stephen W. Bedell · Wappingers Falls, US
• Kangguo Cheng · Schenectady, US
• Bruce B. Doris · Brewster, US
• Ali Khakifirooz · Los Altos, US
• Pranita Kulkarni · Slingerlands, US
• Katherine L. Saenger · Ossining, US

Key dates

• Filing date: Sep 21, 2010
• Grant date: Jul 16, 2013
• Expiry date: Feb 8, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038

Abstract

Strained Si and strained SiGe on insulator devices, methods of manufacture and design structures is provided. The method includes growing an SiGe layer on a silicon on insulator wafer. The method further includes patterning the SiGe layer into PFET and NFET regions such that a strain in the SiGe layer in the PFET and NFET regions is relaxed. The method further includes amorphizing by ion implantation at least a portion of an Si layer directly underneath the SiGe layer. The method further includes performing a thermal anneal to recrystallize the Si layer such that a lattice constant is matched to that of the relaxed SiGe, thereby creating a tensile strain on the NFET region. The method further includes removing the SiGe layer from the NFET region. The method further includes performing a Ge process to convert the Si layer in the PFET region into compressively strained SiGe.