Patent · US Active

Methods of forming stressed silicon-carbon areas in an NMOS transistor

US8536034B2 · kind B2 · utility

4Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 24, 2011
Grant dateSep 17, 2013
Priority date
Expiry dateOct 19, 2031

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/797
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Disclosed herein are various methods of forming stressed silicon-carbon areas in an NMOS transistor device. In one example, a method disclosed herein includes forming a layer of amorphous carbon above a surface of a semiconducting substrate comprising a plurality of N-doped regions and performing an ion implantation process on the layer of amorphous carbon to dislodge carbon atoms from the layer of amorphous carbon and to drive the dislodged carbon atoms into the N-doped regions in the substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.