Semiconductor structure having NFET extension last implants

US8546203B1 · kind B1 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Kangguo Cheng · Schenectady, US
• Bruce B. Doris · Brewster, US
• Bala Haran · Columbia, US
• Pranita Kulkarni · Slingerlands, US
• Nicolas Loubet · Guilderland, US
• Amlan Majumdar · White Plains, US
• Stefan Schmitz · Stuttgart, DE

Key dates

• Filing date: Jul 17, 2012
• Grant date: Oct 1, 2013
• Expiry date: Jul 17, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/015

Abstract

Method of forming a semiconductor structure which includes an extremely thin silicon-on-insulator (ETSOI) semiconductor structure having a PFET portion and an NFET portion, a gate structure in the PFET portion and the NFET portion, a high quality nitride spacer adjacent to the gate structures in the PFET portion and the NFET portion and a doped faceted epitaxial silicon germanium raised source/drain (RSD) in the PFET portion. Low quality nitride and high quality nitride are formed on the semiconductor structure. The high quality nitride in the NFET portion is damaged by ion implantation to facilitate its removal. A faceted epitaxial silicon RSD is formed on the ETSOI adjacent to the high quality nitride in the NFET portion. The high quality nitride in the PFET portion is damaged by ion implantation to facilitate its removal. Extensions are ion implanted into the ETSOI underneath the gate structure in the NFET portion.