MRAM fabrication method with sidewall cleaning

US8574928B2 · kind B2 · utility

Assignee

• Avalanche Technology, Inc. · US

Inventors

• Kimihiro Satoh · Wilsonville, US
• Yiming Huai · Pleasanton, US
• Yuchen Zhou · San Jose, US
• Jing Zhang · Los Altos, US
• Dong Ha Jung · Pleasanton, US
• Ebrahim Abedifard · Sunnyvale, US
• Rajiv Yadav Ranjan · San Jose, US
• Parviz Keshtbod · Los Altos Hills, US

Key dates

• Filing date: Apr 10, 2012
• Grant date: Nov 5, 2013
• Expiry date: Jul 20, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N50/01

Abstract

Fabrication methods for MRAM are described wherein any re-deposited metal on the sidewalls of the memory element pillars is cleaned before the interconnection process is begun. In embodiments the pillars are first fabricated, then a dielectric material is deposited on the pillars over the re-deposited metal on the sidewalls. The dielectric material substantially covers any exposed metal and therefore reduces sources of re-deposition during subsequent etching. Etching is then performed to remove the dielectric material from the top electrode and the sidewalls of the pillars down to at least the bottom edge of the barrier. The result is that the previously re-deposited metal that could result in an electrical short on the sidewalls of the barrier is removed. Various embodiments of the invention include ways of enhancing or optimizing the process. The bitline interconnection process proceeds after the sidewalls have been etched clean as described.