Power MOS device fabrication
US8597998B2 · kind B2 · utility
9Cited by
4References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 5, 2012 |
| Grant date | Dec 3, 2013 |
| Priority date | — |
| Expiry date | Sep 5, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/64
Abstract
Fabricating a semiconductor device includes forming a mask on a substrate having a top substrate surface; forming a gate trench in the substrate, through the mask; depositing gate material in the gate trench; removing the mask to leave a gate structure; implanting a body region; implanting a source region; forming a source body contact trench having a trench wall and a trench bottom; forming a plug in the source body contact trench, wherein the plug extends below a bottom of the body region; and disposing conductive material in the source body contact trench, on top of the plug.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.