Patent · US Active

Integrated circuit devices and systems having programmable impedance elements with different response types

US8675396B1 · kind B1 · utility

4Cited by

3References

23Claims

0Family size

Assignee

Adesto Technologies Corporation · US

Inventors

Narbeh Derhacobian · Belmont, US
Ishai Naveh · San Jose, US
Shane Hollmer · Grass Valley, US

Key dates

Filing date	Dec 10, 2012
Grant date	Mar 18, 2014
Priority date	—
Expiry date	Dec 10, 2032

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/816
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated circuit (IC) device can include a memory array having memory elements formed with a solid ion conductor, the memory array programmable to provide portions with different response types; and a logic section comprising logic circuits configured to perform logic functions, the logic section being coupled to the memory array to store and read data values therefrom. A memory device can also have a plurality of access ports, each configurable to access any of the different portions of the memory array. A memory device can further include a read circuit configured to read data values from the different portions according to the response type of each portion.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.