Circuits having programmable impedance elements
US8687403B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2011 |
| Grant date | Apr 1, 2014 |
| Priority date | — |
| Expiry date | Nov 15, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/009
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) device may include a first portion having a plurality of volatile memory cells; and a second portion coupled by a data transfer path to the first portion, the second portion including a plurality of nonvolatile memory cells, each nonvolatile memory cell including at least one resistive element programmable more than once between different resistance values. A memory device may also include variable impedance elements accessible by access bipolar junction transistors (BJTs) having at least a portion formed by a semiconductor layer formed over a substrate. A memory device may also include a plurality of memory elements that each includes a dielectric layer formed between a first and second electrode, the dielectric layer including a solid electrolyte with a soluble metal having a mobility less than that of silver in a germanium disulfide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.