Patent · US Active

Method of semiconductor integrated circuit fabrication

US8735252B2 · kind B2 · utility

9Cited by
0References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 7, 2012
Grant dateMay 27, 2014
Priority date
Expiry dateJun 7, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/024
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method of fabricating a semiconductor IC is disclosed. The method includes receiving a device. The device includes a semiconductor substrate, a plurality of fins and trenches between fins in the semiconductor substrate. The method also includes filling the trenches with a dielectric material to form shallow trench isolations (STI), applying a low-thermal-budget annealing to the dielectric material, and applying a wet-treatment to the dielectric material.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.