Epitaxial film growth on patterned substrate

US8785907B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Niti Goel · Portland, US
• Niloy Mukherjee · Beaverton, US
• Seung Hoon Sung · Beaverton, US
• Van H. Le · Portland, US
• Matthew V. Metz · Portland, US
• Jack T. Kavalieros · Portland, US
• Ravi Pillarisetty · Portland, US
• Sanaz K. Gardner · Portland, US
• Sansaptak Dasgupta · Hillsboro, US
• Willy Rachmady · Beaverton, US
• Benjamin Chu-Kung · Portland, US
• Marko Radosavljevic · Portland, US
• Gilbert Dewey · Beaverton, US
• Marc C. French · Forest Grove, US
• Jessica S. Kachian · Portland, US
• Satyarth Suri · Hillsboro, US
• Robert S. Chau · Beaverton, US

Key dates

• Filing date: Dec 20, 2012
• Grant date: Jul 22, 2014
• Expiry date: Dec 20, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76232
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An embodiment includes depositing a material onto a substrate where the material includes a different lattice constant than the substrate (e.g., III-V or IV epitaxial (EPI) material on a Si substrate). An embodiment includes an EPI layer formed within a trench having walls that narrow as the trench extends upwards. An embodiment includes an EPI layer formed within a trench using multiple growth temperatures. A defect barrier, formed in the EPI layer when the temperature changes, contains defects within the trench and below the defect barrier. The EPI layer above the defect barrier and within the trench is relatively defect free. An embodiment includes an EPI layer annealed within a trench to induce defect annihilation. An embodiment includes an EPI superlattice formed within a trench and covered with a relatively defect free EPI layer (that is still included in the trench). Other embodiments are described herein.