Patent · US Active

Methods of forming a semiconductor device by performing a wet acid etching process while preventing or reducing loss of active area and/or isolation regions

US8815674B1 · kind B1 · utility

4Cited by
0References
13Claims
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Key dates

Filing dateFeb 4, 2014
Grant dateAug 26, 2014
Priority date
Expiry dateFeb 4, 2034

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/60

Abstract

One method disclosed includes forming a sidewall spacer proximate a gate structure, forming a sacrificial layer of material above a protective cap layer, the sidewall spacer and a substrate, forming a sacrificial protection layer above the sacrificial layer, reducing a thickness of the sacrificial protection layer such that its upper surface is positioned at a level that is below the upper surface of the protective cap layer, performing a first etching process to remove a portion of the sacrificial layer and thereby expose the protective cap layer for further processing, performing a wet acid etching process that includes diluted HF acid in the etch chemistry to remove the protective cap layer and performing at least one process operation to remove at least one of the reduced-thickness sacrificial protection layer or the sacrificial layer from above the surface of the substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.