Method of forming a semiconductor structure including a vertical nanowire
US8835255B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 2013 |
| Grant date | Sep 16, 2014 |
| Priority date | — |
| Expiry date | Apr 11, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/122
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method comprises providing a semiconductor structure comprising a substrate and a nanowire above the substrate. The nanowire comprises a first semiconductor material and extends in a vertical direction of the substrate. A material layer is formed above the substrate. The material layer annularly encloses the nanowire. A first part of the nanowire is selectively removed relative to the material layer. A second part of the nanowire is not removed. A distal end of the second part of the nanowire distal from the substrate is closer to the substrate than a surface of the material layer so that the semiconductor structure has a recess at the location of the nanowire. The distal end of the nanowire is exposed at the bottom of the recess. The recess is filled with a second semiconductor material. The second semiconductor material is differently doped than the first semiconductor material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.