Integrated circuit with electrostatically coupled MOS transistors and method for producing such an integrated circuit
US8853785B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2010 |
| Grant date | Oct 7, 2014 |
| Priority date | — |
| Expiry date | Feb 9, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/01
Abstract
An integrated circuit including at least: a first MOS transistor; a second MOS transistor, arranged on the first MOS transistor, the second MOS transistor including a channel region in at least one semiconductor layer including two approximately parallel primary faces; a portion of at least one electrically conductive material electrically connected to a gate of the first transistor and arranged between the gate of the first transistor and the channel region of the second transistor; a dielectric layer arranged at least between the portion of the electrically conductive material and the channel region of the second transistor; and a section of the channel region of the second transistor in a plane parallel to the two primary faces of the semiconductor layer is included in a section of the portion of the electrically conductive material projected in said plane.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.