Defect transferred and lattice mismatched epitaxial film

US8872225B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Benjamin Chu-Kung · Portland, US
• Van H. Le · Portland, US
• Robert S. Chau · Beaverton, US
• Sansaptak Dasgupta · Hillsboro, US
• Gilbert Dewey · Beaverton, US
• Niti Goel · Portland, US
• Jack T. Kavalieros · Portland, US
• Matthew V. Metz · Portland, US
• Niloy Mukherjee · Beaverton, US
• Ravi Pillarisetty · Portland, US
• Willy Rachmady · Beaverton, US
• Marko Radosavljevic · Portland, US
• Han Wui Then · Portland, US
• Nancy Zelick · Portland, US

Key dates

• Filing date: Dec 20, 2012
• Grant date: Oct 28, 2014
• Expiry date: Dec 20, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/822

Abstract

An embodiment uses a very thin layer nanostructure (e.g., a Si or SiGe fin) as a template to grow a crystalline, non-lattice matched, epitaxial (EPI) layer. In one embodiment the volume ratio between the nanostructure and EPI layer is such that the EPI layer is thicker than the nanostructure. In some embodiments a very thin bridge layer is included between the nanostructure and EPI. An embodiment includes a CMOS device where EPI layers covering fins (or that once covered fins) are oppositely polarized from one another. An embodiment includes a CMOS device where an EPI layer covering a fin (or that once covered a fin) is oppositely polarized from a bridge layer covering a fin (or that once covered a fin). Thus, various embodiments are disclosed from transferring defects from an EPI layer to a nanostructure (that is left present or removed). Other embodiments are described herein.