Etch depth determination structure
US8884406B2 · kind B2 · utility
0Cited by
38References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2011 |
| Grant date | Nov 11, 2014 |
| Priority date | — |
| Expiry date | Feb 25, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/117
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device wafer includes a test structure. The test structure includes a layer of material having an angle-shaped test portion disposed on at least a portion of a surface of the semiconductor wafer. A ruler marking on the surface of the semiconductor wafer proximate the test portion is adapted to facilitate measurement of a change in length of the test portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.