Method to enable compressively strained pFET channel in a FinFET structure by implant and thermal diffusion

US8900973B2 · kind B2 · utility

Assignees

• International Business Machines Corporation · US
• GlobalFoundries Inc. · KY
• Renesas Electronics America Inc. · US
• STMICROELECTRONICS, INC. · US

Inventors

• Nathaniel Berliner · Albany, US
• Pranita Kulkarni · Slingerlands, US
• Nicolas Loubet · Guilderland, US
• Kingsuk Maitra · Fremont, US
• Sanjay C. Mehta · Niskayuna, US
• Paul A. Ronsheim · Hopewell Junction, US
• Toyoji Yamamoto · Yokohama, JP
• Zhengmao Zhu · Poughkeepsie, US

Key dates

• Filing date: Aug 30, 2011
• Grant date: Dec 2, 2014
• Expiry date: Dec 15, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/215

Abstract

A method of making a semiconductor device patterns a first fin in a pFET region, and patterns a second fin in an nFET region. A plurality of conformal microlayers containing a straining material are deposited on the first and second fins. A protective cap material is formed on the first fin, and the conformal layers are selectively removed from the second fin. The straining material is then thermally diffused into the first fin. The protective cap material is removed from the first fin after the thermal annealing and after the conformal micro layers are selectively removed from the second fin.